IPC Certified IPC Specialist (CIS) — A-610 + J-STD-001 — Study Guide

IPC Certified IPC Specialist (CIS) — A-610 + J-STD-001 — Study Guide

Credential: IPC Certified IPC Specialist (CIS) — two tracks covered in this guide Issuing body: IPC (Association Connecting Electronics Industries) Jurisdiction: International (US-based body; worldwide adoption) Level: Specialist — operator/inspector level (the hands-on counterpart to the designer-level CID) Prerequisites: A-610 CIS: none formal. J-STD-001 CIS: basic soldering skills. Both: typically 3-day course, modules 1–7 (A-610) / per-module structure (J-STD-001). Exam format: Open-book written exams at 70% or better per module; J-STD-001 adds hands-on practical exams per optional module (soldering workmanship you must physically demonstrate). Verified via IPC training-provider pages and IPC CIS Policies & Procedures v7.2. Renewal: Every 24 months via recertification course (accelerated review + hand-skills check-out for J-STD-001) or exam-only path; renewal within 6 months of expiry extends from the expiry date.

This guide covers both CIS tracks in one file because candidates usually earn them together and employers list them together — but they certify different skills against different documents. A-610 CIS = acceptability of electronic assemblies (can you inspect and judge a built board?). J-STD-001 CIS = requirements for soldered electrical and electronic assemblies (can you build to the requirement, including hands-on soldering?). Know which document governs which question: A-610 describes what acceptable looks like; J-STD-001 prescribes what the process must achieve.

PART 1 — IPC-A-610 CIS (Acceptability of Electronic Assemblies)

1.1 Pathway

1. Attend the A-610 CIS course (typically 3 days, Modules 1–7: introduction/policies, soldered connections, component damage, terminals, through-hole, SMT, plus ESD/electrostatic discharge awareness woven through).
2. Pass the open-book written exam for each module at 70%+ — Module 1 (policies, procedures, and general requirements) is mandatory; the rest follow the course modules.
3. Hold the certification 24 months; recertify by course or exam-only path.

1.2 The core mental model: Target / Acceptable / Nonconforming (+ Process Indicator)

A-610 classifies every feature into conditions — this taxonomy is the entire inspection philosophy:

• Target: the ideal, preferred condition — not always achievable, but the aim.
• Acceptable: meets design/reliability requirements though not perfect — ships.
• Nonconforming: fails requirements — rework, repair, scrap, or customer concession.
• Process Indicator: a condition that doesn't affect form/fit/function but signals process drift (e.g., slight solder discoloration) — monitor, don't scrap. Confusing a process indicator with a defect is the classic novice inspector error and a favorite exam trap.

1.3 Product classes — the severity dial

• Class 1 — General electronic products: consumer goods where function is the requirement and cosmetics are secondary.
• Class 2 — Dedicated service electronic products: commercial/industrial — continued performance and extended life required; uninterrupted service desired but not critical.
• Class 3 — High-performance/harsh environment: aerospace, medical life-support, military — continued performance critical, downtime intolerable, harsh environment.

Why classes matter: the same solder joint feature can be acceptable in Class 1/2 and nonconforming in Class 3 (e.g., voiding percentages, lead protrusion, solder fillet coverage minimums tighten with class). The exam constantly asks "Class 3 — accept or reject?" where the Class 2 answer differs. Always check the class before judging.

1.4 Soldered connections — what the inspector's eye must know

Wetting and fillets: a good joint shows smooth, concave fillets with complete wetting (solder flows and bonds, contact angle < 90°). Dewetting (solder recedes after wetting — mottled appearance) and non-wetting (solder balls up, >90° contact angle) are distinct failure modes with distinct causes — the exam tests the vocabulary because the corrective action differs (dewetting = surface contamination/oxidation; non-wetting = insufficient heat or unsolderable surface).

Through-hole acceptance criteria (the exam's favorite diagrams):

• Vertical fill: 100% target; Class 2 minimum 75% vertical fill (with 100% wetting on both sides for the remainder... know the class table); Class 3 demands 75% with stricter conditions.
• Lead protrusion: enough to verify the joint, not so much it risks shorting — class-dependent maxima.
• Solder balls/splatter: process indicators vs. defects depending on mobility and entrapment risk.

SMT acceptance criteria:

• Chip components: side overhang ≤ 25% of component width (Class 2/3); end-joint wetting visible; tombstoning = nonconforming (one end lifted).
• Gull-wing leads: toe, heel, and side fillets with minimum height fractions of lead thickness; lead coplanarity and alignment tolerances.
• J-leads, QFN/BGA: voiding criteria (BGA voiding ≤ 25% of ball area for Class 3 in the x-ray image is the commonly tested threshold — verify against the current revision's figures).
• Flat-pack/no-clean: solder ball entrapment under low-standoff components.

Soldering anomalies to recognize: disturbed/cracked joints (movement during solidification — frosty, fractured appearance), solder projections/icicles (excess, sharp — shorting risk), insufficient solder, solder bridging (nonconforming always — it's a short), flux residue classes (rosin vs. no-clean vs. water-soluble — residue acceptability depends on flux type and class).

1.5 Component damage, terminals, and mechanical assembly

• Component damage: cracks in ceramic bodies, lifted pads, measling/crazing in laminate, damaged markings. Know the laminate-defect vocabulary (measling = discrete white spots below surface from thermal stress; delamination = separation — always nonconforming beyond limits).
• Terminals: wire-wrap, crimp, insulation displacement — each has wrap-turn counts, crimp height/width criteria, bell-mouth and conductor-brush requirements.
• Conformal coating and staking: coverage, thickness, bubbles/voids criteria; staking adhesive fillets for mechanical support.

1.6 ESD awareness (woven through both tracks)

ESD models: HBM (human body model), CDM (charged device model — the dominant killer of modern small-geometry ICs), MM. Protected-area requirements: wrist straps, dissipative worksurfaces, grounding, humidity control, ESDS packaging. The exam tests that you treat ESD controls as process requirements, not optional precautions.

PART 2 — IPC J-STD-001 CIS (Requirements for Soldered Electrical and Electronic Assemblies)

2.1 Pathway

1. Prerequisite: basic soldering skills (you must already handle an iron).
2. Course with hands-on practical modules: wire/terminal soldering, through-hole, SMT — each optional module has a written open-book exam (70%+) plus a practical exam where your soldered workmanship samples are inspected to the standard.
3. 24-month term; recertification via accelerated course with hand-skills check-out.

2.2 The core mental model: requirements, not just acceptability

J-STD-001 is a requirements document — it specifies what materials, processes, and workmanship shall achieve. Where A-610 shows pictures of acceptable joints, J-STD-001 specifies the process controls that produce them: flux types and activity levels, solder alloy requirements (including lead-free SAC alloys and their higher process temperatures), thermal profiles, cleanliness and ionic-contamination limits, and personnel proficiency.

Key distinction the exam probes: A-610 says "this fillet is acceptable"; J-STD-001 says "the process shall produce fillets meeting these requirements, using these materials, with operators demonstrating this proficiency." One is inspection language, the other is manufacturing language.

2.3 Materials and process requirements

• Solder alloys: Sn63/Pb37 eutectic (183°C — single melting point, the classic), Sn62/Pb36/Ag2, and lead-free SAC305 (Sn96.5/Ag3.0/Cu0.5, melting range ~217–220°C). Know that lead-free's higher liquidus (~217°C vs. 183°C) raises process temperatures, stresses components and laminate more (Tg relevance — ties to the CID material knowledge), and changes wetting appearance (lead-free joints look duller/grainier — not a defect, a frequent misjudgment).
• Flux classification: rosin (R/RA/RMA), water-soluble, no-clean — activity levels (L/M/H) and when each is permitted by class. No-clean flux residue is designed to remain; water-soluble must be cleaned (ionic residue → corrosion/electromigration).
• Cleanliness: ionic contamination limits (resistivity of solvent extract — ROSE testing), and why Class 3 has tighter limits (dendritic growth under bias in humid environments).

2.4 Workmanship requirements by interconnect type

• Wire and terminal connections: strip length, insulation clearance (insulation shall not enter the solder fillet — but clearance maxima exist to prevent exposed conductor), wire-wrap turn counts, hook/turret/cup terminal wrapping rules.
• Through-hole: same acceptance geometry as A-610 (the two documents are technically aligned — J-STD-001 §8 and A-610 §7 describe the same joints), plus process requirements: hole fill, thermal management of large planes (thermal reliefs — the design-for-solderability link back to CID).
• Surface mount: placement accuracy, reflow profile requirements (soak, time-above-liquidus, peak temperature, ramp rates — know the shape of a correct profile and what each zone does), hand-soldering iron temperature and dwell limits (excessive dwell delaminates pads and damages components).

2.5 Practical-exam survival (hands-on modules)

The practical exam inspects your actual soldered coupons to J-STD-001 workmanship: consistent fillets, no bridging, no cold joints, no lifted pads, proper insulation clearances. Veteran advice: clean your tip, tin it, use flux generously, and heat the joint — not the solder. Most practical failures are cold/disturbed joints from feeding solder onto a cold pad, and lifted pads from overheating during rework. Practice on scrap boards until your joints are boringly consistent.

PART 3 — Shared exam strategy, pitfalls, practice

3.1 Standards cross-reference

3.2 Pitfalls and trap patterns

1. Class blindness. The #1 trap: judging a joint without confirming the product class. Class 3 tightens nearly everything.
2. Target vs. acceptable. Marking an "acceptable but not target" condition as nonconforming — the exam punishes perfectionism.
3. Process indicator vs. defect. Scrapping (or passing without comment) a process indicator — the correct disposition is document and monitor.
4. A-610 vs. J-STD-001 language. "The process shall..." = J-STD-001; "the fillet shall exhibit..." with accept/reject photos = A-610. Questions deliberately mix the vocabularies.
5. Lead-free appearance. Dull, grainy SAC joints are normal — judging them as cold/disturbed is a classic error.
6. Dewetting vs. non-wetting. Different causes, different corrective actions — the exam tests the distinction, not just the spelling.
7. Practical-exam rushing (J-STD-001). Speed impresses nobody; consistent, in-spec joints do. Inspect your own coupons before submitting — the examiner will.

3.3 Exam strategy

• Open book, 70% per module. Tab the document by section (solder requirements, SMT, through-hole, wire/terminal, cleaning, coating). The exam is a retrieval race — know where each criterion lives.
• Answer from the document, not experience. Your shop's practice may differ from the standard; the exam grades the standard.
• For J-STD-001 practicals: warm up on scrap, manage your time per coupon, and never submit a joint you wouldn't accept as an inspector — because the examiner is one.
• Time management: written modules are generous; don't overthink. If two answers seem right, re-read the class designation in the question stem — it usually breaks the tie.

3.4 Practice problems (answers at end)

1. An SMT chip joint shows complete wetting and a smooth fillet, but the component has 20% side overhang. Product is Class 2. Accept, reject, or process indicator? What changes for Class 3?
2. A through-hole joint on a Class 3 assembly shows 80% vertical solder fill with full wetting top and bottom. Accept or reject?
3. Define the difference between dewetting and non-wetting, and name one likely cause of each.
4. A BGA x-ray shows voiding covering 30% of a ball's area on a Class 3 product. What is the disposition, and which document's criteria apply?
5. During J-STD-001 practical soldering, your iron dwells 8 seconds on a pad to get the solder to flow, and the pad lifts. Name two things you did wrong.
6. A no-clean flux assembly shows benign-looking residue around SMT joints on a Class 2 product. The residue is from the qualified no-clean process. Accept or reject?
7. True/false: "A-610 CIS and J-STD-001 CIS certify the same skill set, so holding one makes the other redundant." Justify.

Answers:

1. Accept for Class 2 (side overhang ≤ 25% permitted). For Class 3 the 25% limit also applies to chip side overhang — still acceptable at 20%; the tightening appears in other criteria (voiding, fill). (Key point: check the class table rather than assuming.)
2. Accept — Class 3 requires 75% minimum vertical fill with 100% wetting on both terminations; 80% meets it.
3. Dewetting: solder initially wets then recedes, leaving a mottled/irregular surface — cause: surface contamination or oxidation, marginal flux. Non-wetting: solder never bonds, balls up with >90° contact angle — cause: insufficient heat or unsolderable/contaminated surface finish.
4. Nonconforming for Class 3 (voiding limit 25% of ball area). Criteria: IPC-A-610 (acceptability); the x-ray inspection method is the A-610 workmanship domain.
5. (1) Excessive dwell time — overheated the pad/adhesive, delaminating it; (2) heating the solder instead of the joint / insufficient tip heat transfer — likely a dirty or undersized tip, and failure to use flux and heat the pad+lead together.
6. Accept — no-clean residue from a qualified process is acceptable by design; it is not a defect (it would be a process indicator at most, and benign here).
7. False. A-610 CIS certifies inspection/acceptance judgment of built assemblies; J-STD-001 CIS certifies process and workmanship including hands-on soldering proficiency. Complementary, not redundant.

Original ETS reference writing, verified against public sources on 2026-09-30. Thin sourcing is flagged inline. Not legal advice — confirm current editions with the issuing body.